In Part 1 (this article) I give an overview on the ARM Cortex-M interrupt system. In this article I’m discussing ARM Cortex-M0/M0+ (ARMv6-M), M3(ARMv7-M) and M4/M7 (ARMv7E-M). Because problems with interrupts are typically hard to track down, they are not easy to fix. Well, I think everyone agrees that ‘most of the time’ is not good enough. Amazingly, I see many times over that even if the interrupts are configured in a clearly wrong way, surprisingly the application ‘seems’ to work, at least most of the time. I have seen so many cases of incorrect interrupt usage within the RTOS that I think it deserves a dedicated article. I’m covering the topic of FreeRTOS and interrupts in my university lecture material. It supports many different architectures, including the ARM Cortex-M architectures. ![]() ![]() IntroductionįreeRTOS is probably the most popular operating system for microcontroller. □ I have found the article from Miro Samek very helpful for understanding the ARM Cortex interrupts, and concepts of his article in have been used in this article too, so be sure to check out his work too (the links to his articles are in the Links section too). Understanding the NVIC and the ARM Cortex-M interrupt system is essential for every embedded application, but even for if using an realtime operating system: if you mess up with interrupts, very bad things will happen….
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